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The CDC-1324 is the main radar processor board used in the JRC JMA-9122 series marine radar. As the core processing unit, it handles signal processing, video generation, target processing, and interfaces with the radar display and other subsystems. The processor card is central to the radar’s ability to:
Decode and process returned radar echoes
Apply filtering and clutter suppression
Generate target tracking data
Drive the radar display graphics
Communicate with bridge systems
This board is integrated into the radar’s internal electronics rack and communicates with the radar’s transmitter, receiver, antenna unit, and operator consoles.
Manages scanning speed synchronization
Interfaces with heading, gyro, and GPS inputs
Controls range scales and tuning settings
Handles radar mode switching (sea/clutter modes)
Interface to display unit(s) via digital data links
NMEA / IEC 61162 outputs to ECDIS/Autopilot
Remote control & configuration signals
Alarm/event outputs
| Parameter | Typical / Functional Description |
|---|---|
| Supply Voltage | Internal regulated rail (derived from radar power supply) |
| Power Consumption | < 10 W (logic board level) |
| Digital Logic Levels | TTL / CMOS / LVDS interfaces |
| Clock & Timing | High-speed clocks for DSP / FPGA processing |
| Component | Role |
|---|---|
| CPU / DSP / FPGA | Main radar signal and control processor |
| RAM / Buffer Memory | Stores video frames, processing buffers |
| Non-volatile Storage | Firmware and configuration parameters |
| FPGA Logic | Real-time pulse processing and bus control |
| Condition | Value |
|---|---|
| Operating Temp Range | Typical marine electronics standard |
| Humidity | Up to 95% non-condensing |
| Vibration / Shock | Marine grade per IEC 60945 |
| EMC | Designed for shipboard EMC compliance |
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